Li Jiang 蒋力
Research Professor · Doctoral Supervisor
研究员 · 博士生导师
School of Computer Science, Shanghai Jiao Tong University
Institute of Scalable Computing
上海交通大学 英国威廉希尔公司
可扩展计算研究所
School of Computer Science, Shanghai Jiao Tong University
Institute of Scalable Computing
上海交通大学 英国威廉希尔公司
可扩展计算研究所
I am a Research Professor and Doctoral Supervisor in the School of Computer Science at Shanghai Jiao Tong University. My research sits at the intersection of computer architecture and design automation, with a focus on AI-specific processors, compilers, heterogeneous accelerators, and processing-in-memory / computing-in-memory (PIM/CIM) architectures — from 3-D IC test and neuromorphic computing to neural-network compression and large-model systems. I have published 160+ peer-reviewed papers (per DBLP), received two Best Paper Awards (DATE 2022, 2023), the IEEE TTTC E. J. McCluskey Doctoral Thesis Award (Asia 1st place, global finalist), and multiple best-paper nominations, and I was selected for the National Young Top-Notch Talent Program.
我是英国威廉希尔公司的研究员、博士生导师。我的研究聚焦于 计算机体系结构与设计自动化/EDA 的交叉领域， 涉及 AI 专用处理器、编译器、异构加速器，以及存算一体（PIM/CIM）架构——从 3D-IC 测试、 神经形态计算，到神经网络压缩与大模型系统。 已在相关领域发表会议与期刊论文 160 余篇（以 DBLP 为准），两获最佳论文奖 （DATE 2022、2023），获 IEEE TTTC E. J. McCluskey 最佳博士论文奖 （亚洲第一、全球入围）及多次最佳论文提名，入选国家级青年人才计划。
A defining theme of my work is translating research into real products and standards. My 3-D IC test architecture was adopted into the IEEE P1838 standard; my neural-network compression technology was applied in one of China's first mass-produced computing-in-memory chips; and my team's sparse-compilation techniques have been merged into the open-source MindSpore framework. Alongside my academic role, I serve as Director of Huawei's Datacom Communication Processor Lab and Chief Scientist for heterogeneous communication processors, and as a Distinguished Scientist for high-performance computing at the Shanghai Qizhi Institute.
我的工作一以贯之的主题，是把研究成果落地为真实产品与标准：3D-IC 测试架构入选 IEEE P1838 国际标准；神经网络压缩技术应用于国内首批量产的存算一体芯片； 团队稀疏编译技术已合入开源MindSpore 框架。在学术角色之外，我担任 华为数通通信处理器实验室主任、异构通信处理器首席科学家， 并任上海期智研究院高性能计算杰出科学家。
Contact:联系方式： Office 521, SEIEE Building #3, 800 Dongchuan Road, Minhang, Shanghai 200240 · Tel +86-21-34208232 上海市闵行区东川路 800 号 电院 3 号楼 521 室 · 电话 +86-21-34208232
My group works across the full stack — device, circuit, architecture, compiler, and system — to break the memory wall and power wall for data-centric AI. Our publications cluster into seven directions (see the full DBLP-indexed list):
我的课题组从器件、电路、架构、编译到系统的全栈开展工作，目标是突破以数据为中心的 AI 所面临的 存储墙与功耗墙。我们的论文主要汇聚为七大方向（完整 DBLP 列表 见此处）：
Research that ships. A selection of the partnerships and impact that connect my academic work to industry. 把研究落地成产品。以下为本人在产学研合作与技术转化方面的主要代表性实践。
Director & Chief Scientist for heterogeneous communication processors. Led joint research on PIM for communication systems, near-cache acceleration, sparse AI compilation, and optical-communication PIM; sparse-compilation techniques merged into MindSpore. Recognized with the Huawei Spark Award (2022) and the MOE–Huawei Smart Base "Outstanding Contribution Award" (2021).
任实验室主任兼异构通信处理器首席科学家，主导面向通信系统的存算一体（PIM）、近缓存加速、稀疏 AI 编译、光通信 PIM 等联合研究；稀疏编译技术已合入开源 MindSpore。获华为火花奖（2022）及教育部—华为智能基座突出贡献奖（2021）。
Neural-network compression technology applied in one of China's first mass-produced computing-in-memory chips and deployed across commercial scenarios — a key basis of the Wu Wenjun AI Science & Technology Award (chip category, 2nd prize).
神经网络压缩技术应用于国内首批量产的存算一体（CIM）芯片，并在多个商用场景落地——也是吴文俊人工智能科技奖（芯片类二等奖）的关键支撑。
Collaborations on DRAM failure prediction, DNN compression, and distributed-system I/O anomaly detection. Our FlexQuant dynamic-precision framework is in trial at Alipay, delivering ~40% faster LLM generation and >60% higher throughput.
合作方向包括 DRAM 失效预测、DNN 压缩、分布式系统 I/O 异常检测。我们的 FlexQuant 动态精度框架已在支付宝试点，LLM 生成本项目提速约 40%、吞吐提升超 60%。
Joint research on resource-sharing techniques for 3-D stacked-memory fault-tolerance architectures, contributing to the work honored with the ACM Shanghai Rising Star Award (2019).
面向 3D 堆叠存储器容错架构的资源共享技术联合研究，相关成果获得ACM 上海新星奖（2019）。
Low-power CNN deep-learning image-recognition algorithms, with outcomes adopted in ZTE products.
低功耗 CNN 深度学习图像识别算法，研究成果已应用于中兴产品。
BEVFormer acceleration and computing-in-memory architecture design for autonomous-driving platforms.
面向自动驾驶平台的 BEVFormer 加速与存算一体架构设计。
3-D IC test architecture adopted into the IEEE P1838 standard; MindSpore Community Technical Committee member (2023–). Co-founder and Secretary-General of ChinaDA (2018–).
3D-IC 测试架构入选IEEE P1838 标准；MindSpore 社区技术委员会委员（2023–）；ChinaDA 共同发起人及秘书长（2018–）。
Full author lists below; Li Jiang* denotes corresponding author. 以下列出全部作者；蒋力*为通信作者。
Full publication list (160 formal publications, DBLP-aligned) →完整论文列表（160 篇正式发表，与 DBLP 对齐）→
Our group currently includes 2 faculty, 8 PhD students (plus 3 joint-program PhD students with the Shanghai Qizhi Institute), and 4 master's students (current enrollment; per the university enrollment system, Aug 2026), spanning AI compression, hardware–software co-optimization, and EDA compiler optimization.
课题组目前包含 2 位教研人员、8 名在读博士生（另有 3 名上海期智研究院联培博士生）、4 名在读硕士生（截至 2026 年 8 月，以学校学籍系统为准）， 覆盖 AI 压缩、软硬件协同优化与 EDA 编译优化等方向。